import math
import pandas as pd
import argparse

parser = argparse.ArgumentParser(description="")
parser.add_argument("-f",
                    "--function",
                    choices=['verilog', 'spinal'],
                    required=True,
                    help="select the function to use")
args = parser.parse_args()

df = pd.read_excel('/home/wj/nutstore/note/fpga/spinalHDL/template/template.xlsx',
                   sheet_name='port')

name = df['name'].tolist()
direction = df['direction'].tolist()
width = df['width'].tolist()
function = df['function'].tolist()


def generate_port_verilog(name, direction, width, function):
    width_s = ''
    if width != 1:
        width_s = '[' + str(width - 1).zfill(2) + ':00]' + ' ' * 10
    else:
        width_s = ' ' * 17

    if direction == 'output':
        direction = direction + ' ' * 5
    else:
        direction = direction + ' ' * 6

    comment = ''
    if isinstance(function, str):
        comment = "// " + str(function)

    print('    {}{}{}, {} '.format(direction, width_s, name, comment))


def generate_port_spinal_port(name, direction, width, function):
    name = name + ' ' * (23 - len(name))

    if direction == 'output':
        direction = 'out'
    elif direction == 'input':
        direction = 'in'
    elif direction == 'inout':
        pass

    if width == 1:
        if direction == 'inout':
            width = '(Analog(Bool()))'
        else:
            width = 'Bool()'
    else:
        width = 'UInt(' + str(width) + ' bits)'

    print('    val {} = {} {} '.format(name, direction, width))


for name, direction, width, function in zip(name, direction, width, function):

    if args.function == 'verilog':
        generate_port_verilog(name, direction, width, function)

    elif args.function == 'spinal':
        generate_port_spinal_port(name, direction, width, function)
